hardware - Process syncronization VHDL -

since in vhdl process collection of sequential statements , if write more 1 process these ones executed concurrently possible sync. them?

as example

architeture my_arch_is of my_entity begin     proc_1 : process(...)     begin        -- code     end process;      proc_2 : process(...)     begin        -- code     end process;      proc_3 : process(...)     begin        -- code     end process; end architecture; 

what achieve following, process 1 kind of selector (i.e. assigns bit under specific event) process 2 , 3 instead compute in parallel 2 possible result, compute selector , both results , using vhdl construct "if selector 0 take result of process 2, otherwise take result of process 3", multiplexer.

is possible (if make sense of course)?

yes, possible. , if use example, conditional statement selecting 1 of 2 results, given bit value provided process 1, synthesized multiplexer.